发明名称 Stable parallel loop systems
摘要 Stable Parallel Loop (SPL) systems and exemplary embodiments are described with reference to both software and hardware platforms. A SPL network includes an input surface, internal nodes, connections that selectively link internal nodes, and an output surface. Signals from the environment are received on the input surface. The received signals excite internal nodes of the SPL network. The internal nodes exhibit their own dynamic behavior. As a result of the interconnected network structure and operational characteristics of each node, dynamic loops are formed among certain internal nodes. A dynamic loop is formed when all of internal nodes within an interconnected loop are active. Output from the SPL network is generated based on the dynamic loops that are formed. Tools to develop and implement a SPL network are presented.
申请公布号 US9002765(B1) 申请公布日期 2015.04.07
申请号 US201113295013 申请日期 2011.11.11
申请人 发明人 Ravuri Muralidhar
分类号 G06N3/04;G06N3/08 主分类号 G06N3/04
代理机构 Spano Law Group 代理人 Spano Law Group ;Spano Joseph S.
主权项 1. A method comprising: receiving a plurality of input signals on a plurality of input nodes of a first Stable Parallel Loop (SPL) network; generating a first plurality of persistent dynamic loops formed among a plurality of internal nodes of the SPL network based at least in part on the plurality of input signals; generating a first plurality of output signals on a plurality of output nodes of the SPL network based on the first plurality of persistent dynamic loops; and modifying a property of the SPL network such that the modified SPL network satisfies a similarity condition among a set of training data, wherein the satisfying of the similarity condition involves detecting at least one common dynamic loop present in the modified SPL network for each element of the set of training data.
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