发明名称 Scanning-signal-line driving circuit and display device including same
摘要 In order to supply a low-level potential VSS from a trunk line for the low-level potential VSS to each stage of a shift register, a branch line and an auxiliary line are provided for every plurality of stages of the shift register, and the auxiliary lines are connected to the respective branch lines and the plurality of stages of the shift register. It is also possible to provide an auxiliary line having substantially the same length as the trunk line and to connect all of the branch lines and all of the stages in the shift register to this auxiliary line. A high-level potential VDD may also be supplied using the same method. Consequently, a scanning-signal-line driving circuit is provided in which the frame area and power consumption of a display panel can be reduced when formed on the display panel as an integral unit.
申请公布号 US9001091(B2) 申请公布日期 2015.04.07
申请号 US201013512389 申请日期 2010.06.17
申请人 Sharp Kabushiki Kaisha 发明人 Sakamoto Mayuko;Iwase Yasuaki;Ogasawara Isao;Yamada Takaharu
分类号 G09G5/00;G11C19/28;G09G3/36;G11C19/18 主分类号 G09G5/00
代理机构 Chen Yoshimura LLP 代理人 Chen Yoshimura LLP
主权项 1. A scanning-signal-line driving circuit which drives a plurality of scanning signal lines disposed in the pixel region of a display device, this scanning-signal-line driving circuit comprising: a fixed potential-use trunk line for supplying a fixed potential; a plurality of branch lines connected to said fixed potential-use trunk line; and a single or a plurality of shift registers including a plurality of stages that receive the supply of said fixed potential from said fixed potential-use trunk line via said branch lines, wherein all of the stages included in said single or said plurality of shift registers form an array by being disposed in a line in a specified direction, wherein the number of said branch lines is smaller than the number of the stages included in said array, and wherein the scanning-signal-line driving circuit further comprises an auxiliary line connected to said branch lines and the plurality of stages included in said array.
地址 Osaka JP