Interconnect structure for semiconductor devices

摘要

A method of manufacturing a semiconductor device with a cap layer for a copper interconnect structure formed in a dielectric layer is provided. In an embodiment, a conductive material is embedded within a dielectric layer, the conductive material comprising a first material and having either a recess, a convex surface, or is planar. The conductive material is silicided to form an alloy layer. The alloy layer comprises the first material and a second material of germanium, arsenic, tungsten, or gallium.

主权项

1. A method of manufacturing a semiconductor device, the method comprising:
forming an opening in a substrate, the substrate having a first top surface; filling the opening with a conductive material; and introducing silicon to the conductive material to form a silicide alloy layer overlying the conductive material, wherein after the introducing silicon the conductive material comprises a first material and has a second top surface, the second top surface being planar with the first top surface, the silicide alloy layer having a third top surface that is planar, the silicide alloy layer comprising the first material and a second material, the second material comprising germanium, arsenic, tungsten, or gallium, wherein the introducing silicon to the conductive material further comprises:
introducing a first precursor to the conductive material, the first precursor being a silicon containing precursor; andintroducing a second precursor to the conductive material.