发明名称 Coordinating power mode switching and refresh operations in a memory device
摘要 Provided are a memory system, device, and method for determining to send a refresh command to a memory module according to a refresh rate and incrementing a postponed refresh count while the memory module is in an active mode in response to the determining to send the refresh command. The refresh command is not sent to the memory module when the postponed refresh count is incremented. A determination is made as to whether the postponed refresh count exceeds a count threshold. A refresh command is issued to the memory module to perform refresh in an active mode in response to determining that the postponed refresh count exceeds the count threshold.
申请公布号 US9001608(B1) 申请公布日期 2015.04.07
申请号 US201314099621 申请日期 2013.12.06
申请人 Intel Corporation 发明人 Chishti Zeshan A.;Bhati Ishwar
分类号 G11C7/00;G11C11/406 主分类号 G11C7/00
代理机构 Konrad Raynes Davda & Victor LLP 代理人 Konrad Raynes Davda & Victor LLP ;Victor David W.
主权项 1. A memory system comprising: a memory module; a bus interface to the memory module; a memory controller coupled to the bus interface to communicate with the memory module and including logic that when operates performs operations, the operations comprising: determining to send a refresh command according to a refresh rate;incrementing a postponed refresh count while the memory module is in an active mode in response to the determining to send the refresh command, wherein the refresh command is not sent to the memory module when the postponed refresh count is incremented;determining whether the postponed refresh count exceeds a count threshold; andissuing a refresh command to the memory module to perform refresh in an active mode in response to determining that the postponed refresh count exceeds the count threshold.
地址 Santa Clara CA US