Solid-state image sensor and camera

摘要

A solid-state image sensor has a pixel array including pixel units and column signal lines. Each pixel unit includes a photoelectric converter and an amplifier transistor which outputs a signal to the column signal line. The sensor includes a cascode current source which supplies a current to the amplifier transistor and which includes cascode-connected first and second transistors, a first bias circuit which determines a voltage of a first node connected to a gate of the first transistor, and a second bias circuit which determines a voltage of a second node connected to a gate of the second transistor.

主权项

1. A solid-state image sensor including a pixel array in which a plurality of pixel units are arranged two-dimensionally, the pixel array including a plurality of column signal lines, and each pixel unit including at least one photoelectric converter and an amplifier transistor which outputs, to the column signal line, a signal corresponding to charges generated in the photoelectric converter, the solid-state image sensor comprising:
a cascode current source which supplies a current to the amplifier transistor, the cascode current source including a first transistor and second transistor which are cascode-connected; a first bias circuit which determines a voltage of a first node connected to a gate of the first transistor; a second bias circuit which determines a voltage of a second node connected to a gate of the second transistor; and a first current source which is interposed between a first voltage line and a second voltage line, wherein the amplifier transistor and the cascode current source form a source follower circuit, the first bias circuit determines the voltage of the first node to set a current driving capability of the first transistor when the cascode current source is in an active state, to be equal to a current driving capability of the first transistor when the cascode current source is in an inactive state, the second bias circuit determines the voltage of the second node to set a current driving capability of the second transistor when the cascode current source is in the inactive state, to be smaller than a current driving capability of the second transistor when the cascode current source is in the active state, the first bias circuit includes:
a third transistor which is interposed between the first current source and the second voltage line, anda fourth transistor which is interposed between the first current source and the third voltage line,a gate of the third transistor and the first node are connected to a node between the first current source and the fourth transistor, andthe fourth transistor receives at a gate thereof a voltage which turns on the fourth transistor.