发明名称 Voltage summing buffer, digital-to-analog converter and source driver of display device including the same
摘要 A digital-to-analog converter includes a first decoder, a second decoder and a voltage summing buffer. The first decoder receives upper bits of a digital signal and upper reference voltages to output an upper voltage corresponding to the upper bits. The second decoder configured to receive lower bits of the digital signal and lower reference voltages to output a lower differential voltage corresponding to the lower bits. The voltage summing buffer generates an output voltage based on the upper voltage and the lower differential voltage, such that the output voltage corresponds to the digital signal including the upper bits and the lower bits.
申请公布号 US9001092(B2) 申请公布日期 2015.04.07
申请号 US201213602845 申请日期 2012.09.04
申请人 Samsung Electronics Co., Ltd. 发明人 Kim Ki-Duk
分类号 G09G5/00;G09G3/20;G09G3/32;G09G3/36;H03F3/21;H03F3/45;H03F3/72;H03M1/68;H03M1/76 主分类号 G09G5/00
代理机构 Lee & Morse, P.C. 代理人 Lee & Morse, P.C.
主权项 1. A digital-to-analog converter, comprising: a first decoder configured to receive upper bits of a digital signal and upper reference voltages to output an upper voltage corresponding to the upper bits; a second decoder configured to receive lower bits of the digital signal and lower reference voltages to output a lower differential voltage corresponding to the lower bits; and a voltage summing buffer configured to generate an output voltage based on the upper voltage and the lower differential voltage, the output voltage corresponding to the digital signal including the upper bits and the lower bits.
地址 Suwon-si, Gyeonggi-do KR