Method and system for serial digital interface (SDI) video data extension

摘要

A video data extension system includes a transmitter and a receiver for transmitting and receiving encoded serial data. Transmitter is configured to receive one SDI 3G video stream at 2.97 Gb/s, two HD-SDI video streams at 1.485 Gb/s, two SD-SDI at 270 Mb/s, or one HD-SDI at 1.485 Gb/s and one SD-SDI at 270 Mb/s. Received data is segmented into packets to form an extended video stream for transmission at 3.75 Gb/s. To each packet, idle and header are provided. Data such as RS422 data may be included in the extended video stream. Where the received data includes data from two HD streams, received data are segmented into two groups of data packets for arranging into extended video stream in an alternate manner. Upon receiving the extended video stream, receiver uses idles to align data and header information to separate the HD streams.

主权项

1. A method for video data extension, comprising:
receiving a video bitstream at a data processor, the video bitstream comprising Serial Digital Interface (SDI) video data received at a first bit-rate; wherein the video bitstream comprises a first video stream comprising first serial data and a second video stream comprising second serial data; obtaining a first clock signal from the first video stream and obtaining a second clock signal from the second video stream, the first clock signal and the second clock signal indicative of the first bit rate; generating a third clock signal; converting the first serial data into first parallel data and converting the second serial data into second parallel data; segmenting via the data processor the video bitstream into a plurality of segments by dividing the first parallel data into a plurality of first data packets based on the first clock signal and the third clock signal, and dividing the second parallel data into a plurality of second data packets based on the second clock signal and the third clock signal, wherein the maximum number of bits in any segment of said plurality of segments is n with n a positive integer greater than one, and wherein at least some of said plurality of segments comprise n-bit data segments; appending via a control module an additional segment to each of said plurality of segments for providing an extended SDI video bitstream, wherein the additional segment comprises m-bit information, wherein m is a positive integer greater than one; arranging the first data packets and second data packets in an alternate manner for forming said plurality of segments; and transmitting via a transmitter module the extended SDI video bitstream at a second bit-rate, wherein the second bit-rate is equal to or greater than (n+m)/n times the first bit-rate, wherein the third clock signal is based on the second bit-rate.