发明名称 MEMORY SYSTEM
摘要 A memory system includes a first memory chip, a second memory chip, and a memory controller. The first memory chip and the second memory chip are connected to the memory controller via a plurality of data lines including a first data line and a second data line. The first memory chip is configured to outputs status information via the first data line to the memory controller. The second memory chip is configured to output status information via the second data line to the memory controller at the same time as the first memory chip.
申请公布号 US2015095556(A1) 申请公布日期 2015.04.02
申请号 US201414195765 申请日期 2014.03.03
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 GOTO Hiroyuki;TAKEDA Shinya;TOUHATA Akihito
分类号 G06F12/02 主分类号 G06F12/02
代理机构 代理人
主权项 1. A memory system, comprising: a first memory chip; a second memory chip; and a memory controller connected to the first memory chip and the second memory chip via a plurality of data lines including first and second data lines, and configured to control read and write operations of the first memory chip and the second memory chip, wherein the first memory chip is configured to output status information to the memory controller via the first data line, the second memory chip is configured to output status information to the memory controller via the second data line, and the first and second memory chips are configured to output status information to the memory controller at a same time.
地址 Tokyo JP