PORE SEALING TECHNIQUES FOR POROUS LOW-K DIELECTRIC INTERCONNECT

摘要

The present disclosure relates to a method of forming pore sealing layer for porous low-k dielectric interconnects. The method is performed by removing hard mask layer before pore sealing and/or applying pore sealing layer before etching etch stop layer (ESL). These methods at least have advantages that aspect ratio is improved, line distortion introduced by the hard mask layer is avoided, and critical dimension is less affected by pore sealing layer.

主权项

1. A semiconductor device comprising:
a first conductive layer; an etch stop layer (ESL) over the first conductive layer; a porous low-k dielectric layer formed over the ESL layer; an opening extending downwardly through both the porous low-k dielectric layer and the ESL and stopping at the first conductive layer, wherein the opening defines both a dielectric sidewall in the porous low-k dielectric layer and an ESL sidewall in the ESL; a pore seal layer disposed on the dielectric sidewall but not covering the ESL sidewall; and a conductive material formed over the pore seal layer and filling the opening to form an interconnect structure to a second conductive layer over the porous low-k dielectric layer.