发明名称 SUBTRACTIVE SELF-ALIGNED VIA AND PLUG PATTERNING FOR BACK END OF LINE (BEOL) INTERCONNECTS
摘要 Subtractive self-aligned via and plug patterning for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate. The first layer includes a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. The interconnect structure further includes a second layer of the interconnect structure disposed above the first layer of the interconnect structure. The second layer includes a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating. The metal lines of the first grating are spaced apart from the metal lines of the second grating.
申请公布号 WO2015047318(A1) 申请公布日期 2015.04.02
申请号 WO2013US62319 申请日期 2013.09.27
申请人 INTEL CORPORATION;BRISTOL, ROBERT L.;GSTREIN, FLORIAN;SCHENKER, RICHARD E.;NYHUS, PAUL A.;WALLACE, CHARLES H.;YOO, HUI JAE 发明人 BRISTOL, ROBERT L.;GSTREIN, FLORIAN;SCHENKER, RICHARD E.;NYHUS, PAUL A.;WALLACE, CHARLES H.;YOO, HUI JAE
分类号 H01L21/3205;H01L21/28 主分类号 H01L21/3205
代理机构 代理人
主权项
地址