| 发明名称 |
READ/WRITE ASSIST FOR MEMORIES |
| 摘要 |
An integrated circuit includes one or more bit cells, a word line coupled to the one or more bit cells, and a dummy word line arranged with the word line to have a capacitance therebetween. The capacitance provides a voltage boost or reduction of the word line to assist read and write operations. |
| 申请公布号 |
WO2015048172(A1) |
申请公布日期 |
2015.04.02 |
| 申请号 |
WO2014US57281 |
申请日期 |
2014.09.24 |
| 申请人 |
QUALCOMM INCORPORATED |
发明人 |
GULATI, CHIRAG;SINHA, RAKESH KUMAR;CHABA, RITU;YOON, SEI SEUNG |
| 分类号 |
G11C11/419;G11C8/08;G11C8/14 |
主分类号 |
G11C11/419 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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