发明名称 PROCESSING DEVICE AND METHOD FOR MULTIPLYING POLYNOMIALS
摘要 According to one embodiment, a processing device for multiplying a first polynomial with a second polynomial is described including a first memory storing a representation of the first polynomial, a controller configured to separate the first polynomial into parts, a second memory storing pre-determined results of the multiplications of the second polynomial with possible forms of the parts of the first polynomial, a third memory for storing the result of the multiplication, an address logic, configured to determine, for each part of the first polynomial, a start address of a memory block of the second memory based on the form of the part and the location of the part within the first polynomial and an adder configured to add, for each determined address of the memory block of the second memory, the content of the memory block of the second memory at least partially to the contents of the third memory, wherein the data element of the third memory to which the content of a data element of the memory block of the second memory is added is the same for a plurality of the parts of the first polynomial.
申请公布号 US2015095395(A1) 申请公布日期 2015.04.02
申请号 US201314043937 申请日期 2013.10.02
申请人 Infineon Technologies AG 发明人 Hoeller Andrea;Felicijan Tomaz
分类号 G06F7/52 主分类号 G06F7/52
代理机构 代理人
主权项 1. A processing device for multiplying a first polynomial with a second polynomial comprising a first memory storing a representation of the first polynomial; a controller configured to separate the first polynomial into parts; a second memory storing pre-determined results of the multiplications of the second polynomial with possible forms of the parts of the first polynomial; a third memory for storing the result of the multiplication; an address logic, configured to determine, for each part of the first polynomial, a start address of a memory block of the second memory based on the form of the part and the location of the part within the first polynomial; an adder configured to add, for each determined address of the memory block of the second memory, the content of the memory block of the second memory at least partially to the contents of the third memory, wherein the data element of the third memory to which the content of a data element of the memory block of the second memory is added is the same for a plurality of the parts of the first polynomial.
地址 Neubiberg DE