发明名称 METHODS FOR CONVERTING PLANAR DESIGNS TO FINFET DESIGNS IN THE DESIGN AND FABRICATION OF INTEGRATED CIRCUITS
摘要 Methods for converting planar designs to FinFET designs in the design and fabrication of integrated circuits are provided. In one embodiment, a method for converting a planar integrated circuit design to a non-planar integrated circuit design includes identifying a rectangular silicon active area in the planar integrated circuit design, superimposing a FinFET design grid comprising a plurality of equidistantly-spaced parallel grid lines over the rectangular silicon active area such that two sides of the rectangular silicon active area are parallel to the grid lines, and generating a rectangular active silicon marker area encompassing the silicon active area. Furthermore, the method includes generating fin mandrels longitudinally along every other grid line of the plurality of grid lines and within the active silicon marker area and the silicon active area, and removing the fin mandrels from areas of the design grid outside of the active silicon marker area.
申请公布号 US2015093910(A1) 申请公布日期 2015.04.02
申请号 US201314040037 申请日期 2013.09.27
申请人 GLOBALFOUNDERIES Singapore Pte. Ltd. 发明人 Tan Soon Yoeng;Ramamoorthy Srinidhi;Ho Chye Ee Angeline;Knorr Andreas;Johnson Frank Scott
分类号 G06F17/50;H01L21/8234;H01L21/033 主分类号 G06F17/50
代理机构 代理人
主权项 1. A method for converting a planar integrated circuit design to a non-planar integrated circuit design comprising: identifying, using a computer processor of a computing system, a rectangular silicon active area in the planar integrated circuit design; superimposing, using the computer processor, a FinFET design grid comprising a plurality of equidistantly-spaced parallel grid lines over the rectangular silicon active area such that two sides of the rectangular silicon active area are parallel to the grid lines; generating, using the computer processor, a rectangular active silicon marker area encompassing the silicon active area; generating, using the computer processor, fin mandrels longitudinally along every other grid line of the plurality of grid lines and within the active silicon marker area and the silicon active area; and removing, using the computer processor, a portion of the fin mandrels from the design grid so as to generate the non-planar integrated circuit design.
地址 Singapore SG