发明名称 PARALLEL MONITOR CIRCUIT FOR CAPACITORS
摘要 A parallel monitor circuit for capacitors, comprising: a comparator (CMP1) that compares the charge potential (Vcap) and the equalization potential (V1) of a capacitor (C1); and transistors (Tra1, Trb1) that operate as a result of the output from the comparator and control the charge current such that the charge potential (Vcap) matches the equalization potential (V1). The parallel monitor for capacitors also comprises partial resistors (Ra12, Ra13, Rb12, Rb13) that divide and reduce the resistance voltage of the potential of each electrode at both ends of the capacitor; an operational amplifier (AMP1) that amplifies the difference between the divided voltages and detects the charge potential (Vcap); and a DA converter (80) that sets the equalization potential (V1) as a variable value. The comparator (CMP1) compares the charge potential (Vcap) detected by the operational amplifier (AMP1) and the equalization potential (V1) set by the DA converter (80) and controls the transistors (Tra1, Trb1). As a result, a general-purpose comparator can be used and a plurality of capacitors connected in series can be equalization charged at a desired potential without restrictions.
申请公布号 WO2015045050(A1) 申请公布日期 2015.04.02
申请号 WO2013JP76008 申请日期 2013.09.26
申请人 FUJI ELECTRIC CO., LTD. 发明人 HAMADA YOSHITAKA
分类号 H02J7/02 主分类号 H02J7/02
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