发明名称 |
INTEGRATION OF A MEMORY TRANSISTOR INTO HIGH-K, METAL GATE CMOS PROCESS FLOW |
摘要 |
Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a gate stack of a NVM transistor in a NVM region of a substrate including the NVM region and a plurality of MOS regions; and depositing a high-k dielectric material over the gate stack of the NVM transistor and the plurality of MOS regions to concurrently form a blocking dielectric comprising the high-k dielectric material in the gate stack of the NVM transistor and high-k gate dielectrics in the plurality of MOS regions. In one embodiment, a first metal layer is deposited over the high-k dielectric material and patterned to concurrently form a metal gate over the gate stack of the NVM transistor, and a metal gate of a field effect transistor in one of the MOS regions. |
申请公布号 |
WO2015047701(A1) |
申请公布日期 |
2015.04.02 |
申请号 |
WO2014US54502 |
申请日期 |
2014.09.08 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
RAMKUMAR, KRISHNASWAMY |
分类号 |
H01L21/3205;H01L21/31;H01L21/336;H01L21/469;H01L21/4763;H01L21/8234 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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