TECHNIQUES FOR HANDLING MEMORY ACCESSES BY PROCESSOR-INDEPENDENT EXECUTABLE CODE IN A MULTI-PROCESSOR ENVIRONMENT

摘要

A method and apparatus for virtual address mapping are provided. The method includes determining an offset value respective of at least a first portion of code stored on a code memory unit, generating a first virtual code respective of the first portion of code and a second virtual code respective of a second portion of code stored on the code memory unit; mapping the first virtual code to a first virtual code address and the second virtual code to a second virtual code address; generating a first virtual data respective of the first portion of data and a second virtual data respective of the second portion of data; and mapping the first virtual data to a first virtual data address and the second virtual data to a second virtual data address.

主权项

1. An apparatus for virtual address mapping, comprising:
a first memory unit including a plurality of code portions mapped to a plurality of respective code virtual address starting points, wherein each code virtual address starting point of the plurality of respective code virtual address starting points is set apart from at least one other code virtual address starting point of the plurality of respective code virtual address starting points by an offset of a plurality of offsets; a second memory unit including a plurality of data portions, each data portion respective of a code portion of the plurality of code portions, mapped to a plurality of respective data virtual address starting points, wherein each data virtual address starting point of the plurality of respective data virtual address starting points is set apart from at least one other data virtual address starting point of the plurality of respective data virtual address starting points by the offset of the plurality of offsets used to set apart a code virtual address of the respective code portion; and a memory management unit configured to map each code portion of the plurality of code portions to a first memory unit address of the first memory unit, wherein the memory management unit is further configured to map each data portion of the plurality of data portions to a second memory unit address of the second memory unit.