CELL STRUCTURE OF VDMOS DEVICE AND MANUFACTURING METHOD THEREFOR

摘要

A cell structure of a VDMOS device and a manufacturing method therefor are provided. The cell structure comprises: a drain region (601); an epitaxial layer (602) positioned on the drain region; trenches positioned in the epitaxial layer; field oxide layers (604, 611) lined on the inner walls of the trenches; conductive layers (603, 612) lined on the inner walls of the field oxide layers; gate structures (607, 608) positioned on the epitaxial layer; a first well region (605) and a second well region (610) positioned in the epitaxial layer and between the trenches, and a first source region (606) embedded in the first well region and a second source region (609) embedded in the second well region. By adding the field oxide layers and the conductive layers on the basis of the cell structure of a planar gate VDMOS device, the conduction resistance of the cell structure of the VDMOS device can be effectively reduced.