AMPLIFIER CIRCUIT AND OPERATION METHOD THEREOF

摘要

An amplifier circuit and an operation method thereof are provided. The amplifier circuit includes two stages of amplifiers. When the amplifier circuit is operated in a high gain mode, the two stages of amplifiers are operated normally to provide high gain. When the amplifier circuit is operated in a low gain mode, the second stage of amplifier is turned off, and the first stage of amplifier is coupled to output terminals of the amplifier circuit through signal isolation elements so as to form a single stage of amplifier. Therefore, the amplifier circuit can change the total gain value thereof according to a requirement of gain.

主权项

1. An amplifier circuit, comprising:
a first transistor, having a first terminal, a second terminal and a first control terminal, wherein the first control terminal receives an input signal; a first load, coupled between a first voltage and a first node; a first signal isolation element, coupled between the first node and the first terminal of the first transistor; a first current source, coupled between the second terminal of the first transistor and a second voltage; a second transistor, having a third terminal, a fourth terminal and a second control terminal, wherein the second control terminal receives the input signal, and the fourth terminal is coupled to the second terminal of the first transistor; a second load, coupled between the first voltage and a second node; a second signal isolation element, coupled between the second node and the third terminal of the second transistor; a third transistor, having a fifth terminal, a sixth terminal and a third control terminal, wherein the third control terminal is coupled to the first node, and the fifth terminal is coupled to a third node; a third load, coupled between the first voltage and the third node; a third signal isolation element, coupled between the third node and the first terminal of the first transistor; a second current source, coupled between the sixth terminal of the third transistor and the second voltage; a fourth transistor, having a seventh terminal, an eighth terminal and a fourth control terminal, wherein the forth control terminal is coupled to the second node, the seventh terminal is coupled to a fourth node, and the eighth terminal is coupled to the sixth terminal of the third transistor; a fourth load, coupled between the first voltage and the fourth node; a fourth signal isolation element, coupled between the fourth node and the third terminal of the second transistor; a first switch, coupled between the third control terminal of the third transistor and the second voltage; and a second switch, coupled between the fourth control terminal of the fourth transistor and the second voltage.