用于插入零延迟旁路多工器的正反器电路及方法;FLIP-FLOP CIRCUIT AND METHOD OF INSETING ZERO-DELAY BYPASS MUX

摘要

例示性实施例可揭露一种用于插入零延迟旁路多工器的正反器电路，包含：主控电路，其经组态以接收资料输入、输入时脉信号以及旁路信号，且将中间信号输出至第一节点；以及从属电路，其经组态以接收所述第一节点处的所述中间信号、所述输入时脉信号以及所述旁路信号，且输出输出时脉信号。所述旁路信号控制所述从属电路基于所述旁路信号的逻辑位准而将经缓冲的输入时脉信号以及经拉伸的时脉信号中的一者作为所述输出时脉信号而输出。; and a slave circuit which is configured to receive the intermediate signal at the first node, the input clock signal, and the bypass signal, and output an output clock signal. The bypass signal controls the slave circuit to output one of a buffered input clock signal and a stretched clock signal as the output clock signal based on a logic level of the bypass signal.