Reduced resistance SiGe FinFET devices and method of forming same

摘要

A method for forming a fin field-effect transistor (FinFET) device, comprises forming a plurality of silicon fins on a substrate, depositing silicon germanium (SiGe) on the plurality of fins, forming a gate region by forming a dummy gate stack on a predetermined area of the fins including the SiGe, removing the SiGe from an area of the fins not covered by the dummy gate stack, forming a merged region in the area of the fins not covered by the dummy gate stack to form a source drain region, removing the dummy gate stack to expose the remaining SiGe in the gate region, mixing the SiGe with the silicon fins in the gate region to form SiGe fins, and depositing a gate dielectric and gate metal on the SiGe fins.

主权项

1. A fin field-effect transistor (FinFET) device, comprising:
a substrate; a gate structure formed on the substrate, the gate structure comprising:
a gate dielectric and gate metal; anda silicon germanium (SiGe) fin formed under the gate dielectric and the gate metal; and a source drain region adjacent the gate structure, wherein the source drain region comprises:
a merged epitaxial region including a dopant; anda silicon fin; and a junction between the silicon fin and the SiGe fin, wherein the junction comprises the dopant from the merged epitaxial region.