Semiconductor device having a memory cell region and a peripheral transistor region

摘要

A memory cell region comprises a first interlayer insulating film having a bit contact hole, a contact plug formed of a first conductor film embedded in the bit contact hole, and a second conductor film which is stacked on the first interlayer insulating film to constitute a bit line connected to the contact plug. A peripheral transistor region comprises a peripheral transistor having a gate insulating film and a gate electrode stack formed on the gate insulating film. The gate electrode stack is provided with a metal gate film formed on the gate insulating film, an upper gate film stacked on the metal gate film, and a third conductor film stacked on the upper gate film. A height from a semiconductor substrate to a top face of the upper gate film is equal to or lower than a height of a top face of the first interlayer insulating film.

主权项

1. A semiconductor device comprising:
a semiconductor substrate including a memory cell region and a peripheral transistor region; the memory cell region comprising:
an embedded gate transistor for memory cell;a first interlayer insulating film having a bit contact hole;a contact plug formed of a first conductor film embedded in the bit contact hole; anda second conductor film which is stacked on the first interlayer insulating film to constitute a bit line connected to the contact plug; and the peripheral transistor region comprising:
a peripheral transistor having a gate insulating film including a high-k film;a gate electrode stack formed on the gate insulating film, the gate electrode stack being provided at least with a metal gate film formed on the gate insulating film, an upper gate film stacked on the metal gate film, and a third conductor film stacked on the upper gate film, the third conductor film being formed of the same material and having the same thickness as the second conductor film; anda fourth conductor film provided between the upper gate film and the third conductor film, wherein a height from the semiconductor substrate to a top face of the upper gate film is equal to or lower than a height of a top face of the first interlayer insulating film, wherein the upper gate film comprises a doped polysilicon film, wherein the fourth conductor film is formed of the same material as that of the first conductor film, and wherein a top face of the fourth conductor film is at the same position as a top face of the first conductor film.