发明名称 Semiconductor multi-package module including tape substrate land grid array package stacked over ball grid array package
摘要 A single metal layer tape substrate includes a patterned metal layer affixed to a patterned dielectric layer. The dielectric layer is patterned to provide openings exposing lands and bond sites on bond fingers on the land side of the metal layer. The metal layer is patterned to provide circuit traces as appropriate for interconnection with the die (on the die attach side) and with other elements (such as other packages in a multi-package module). Interconnection with a die is made by wire bonding to exposed traces on a die attach side of the metal layer, and bond fingers and lands for access to testing the package are provided on the opposite (land) side of the metal layer.
申请公布号 US8994162(B2) 申请公布日期 2015.03.31
申请号 US200912511012 申请日期 2009.07.28
申请人 STATS ChipPAC Ltd. 发明人 Karnezos Marcos
分类号 H01L21/44;H01L23/31;H01L23/498;H01L25/03;H01L25/065;H01L23/00 主分类号 H01L21/44
代理机构 Ishimaru & Associates LLP 代理人 Ishimaru & Associates LLP
主权项 1. A single metal layer semiconductor package comprising: a substrate dielectric layer having openings; a metal layer having a land side and a die attach side opposite the land side, the land side over the substrate dielectric layer; a patterned layer directly on the metal layer and the substrate dielectric layer; a die attach adhesive directly on the patterned layer and the metal layer; a die affixed to the patterned layer with the die attach adhesive; and an encapsulation on the die and exposed through the openings of the substrate dielectric layer.
地址 Singapore SG