发明名称 Semiconductor device and method of bonding different size semiconductor die at the wafer level
摘要 A semiconductor wafer has first and second opposing surfaces. A plurality of conductive vias is formed partially through the first surface of the semiconductor wafer. The semiconductor wafer is singulated into a plurality of first semiconductor die. The first semiconductor die are mounted to a carrier. A second semiconductor die is mounted to the first semiconductor die. A footprint of the second semiconductor die is larger than a footprint of the first semiconductor die. An encapsulant is deposited over the first and second semiconductor die and carrier. The carrier is removed. A portion of the second surface is removed to expose the conductive vias. An interconnect structure is formed over a surface of the first semiconductor die opposite the second semiconductor die. Alternatively, a first encapsulant is deposited over the first semiconductor die and carrier, and a second encapsulant is deposited over the second semiconductor die.
申请公布号 US8993377(B2) 申请公布日期 2015.03.31
申请号 US201113231839 申请日期 2011.09.13
申请人 STATS ChipPAC, Ltd. 发明人 Koo Jun Mo;Marimuthu Pandi C.;Yoon Seung Wook;Shim Il Kwon
分类号 H01L21/56;H01L25/07;H01L23/00;H01L21/683;H01L21/768;H01L25/065;H01L23/31;H01L25/10 主分类号 H01L21/56
代理机构 Patent Law Group: Atkins and Associates, P.C. 代理人 Atkins Robert D.;Patent Law Group: Atkins and Associates, P.C.
主权项 1. A method of making a semiconductor device, comprising: providing a semiconductor wafer including an active surface and a second surface opposite the active surface; forming a plurality of conductive vias partially through the active surface of the semiconductor wafer; singulating the semiconductor wafer to separate a first semiconductor die; disposing a second semiconductor die over the first semiconductor die with the active surface oriented toward the second semiconductor die; depositing an encapsulant over and around the first and second semiconductor dies; removing a portion of the second surface to expose a surface of the conductive vias coplanar with the second surface and the encapsulant; and forming an interconnect structure over the first semiconductor die opposite the second semiconductor die, the interconnect structure including a first insulating layer and a first conductive layer.
地址 Singapore SG
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