Display device including at least six transistors

摘要

By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.

主权项

1. A semiconductor device comprising: a first transistor; a second transistor; a third transistor; a fourth transistor; a fifth transistor; and a sixth transistor,
wherein one of a source and a drain of the first transistor is electrically connected to a first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring, wherein one of a source and a drain of the second transistor is electrically connected to a third wiring, wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring, wherein one of a source and a drain of the third transistor is electrically connected to a fourth wiring, wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the sixth transistor, wherein one of a source and a drain of the fourth transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the fourth transistor is electrically connected to the gate of the sixth transistor, wherein one of a source and a drain of the fifth transistor is electrically connected to a gate of the first transistor, wherein a gate of the fifth transistor is electrically connected to a fifth wiring, wherein one of a source and a drain of the sixth transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the sixth transistor is electrically connected to the gate of the first transistor, and wherein the gate of the sixth transistor is electrically connected to a sixth wiring.