Asynchronous correlation circuit, asynchronous full adder circuit, calculation device, correlation device, asynchronous maximum value N detection circuit, and satellite signal acquisition device

摘要

An asynchronous correlation circuit includes a first data supply unit that dual-rail-encodes first sequence data and supplies first data to be provided for next calculation at each time when calculation is completed, a second data supply unit that dual-rail-encodes second sequence data and supplies second data to be provided for next calculation at each time when calculation is completed, an addition result storage unit, a third dual-rail encoding unit that dual-rail-encodes a storage value of the addition result storage unit, an asynchronous full addition unit that adds an output value from the first data supply unit to an output value of the third dual-rail encoding unit with a sign in response to an output value from the second data supply unit, and outputs the value, and a dual-rail decoding unit that decodes and outputs an output value of the asynchronous full addition unit to the addition result storage unit.

主权项

1. An asynchronous correlation circuit comprising:
a first data supply unit that has a first dual-rail encoding part dual-rail-encoding first sequence data including an M-bit (M≧1) first data sequence, and supplies first data to be provided for next calculation at each time when calculation is completed; a second data supply unit that has a second dual-rail encoding part dual-rail-encoding second sequence data including a one-bit second data sequence, and supplies second data to be provided for next calculation at each time when calculation is completed; an addition result storage unit that stores an addition result; a third dual-rail encoding unit that dual-rail-encodes a storage value of the addition result storage unit; an asynchronous full addition unit that adds an output value from the first data supply unit to an output value of the third dual-rail encoding unit with a sign in response to an output value from the second data supply unit, and outputs the value; and a dual-rail decoding unit that decodes a dual-rail-encoded output value by the asynchronous full addition unit and outputs the value to the addition result storage unit.