发明名称 |
Implementing compact current mode logic (CML) inductor capacitor (LC) voltage controlled oscillator (VCO) for high-speed data communications |
摘要 |
A method and a phase locked loop (PLL) circuit for implementing compact current mode logic inductor capacitor voltage controlled oscillator for high speed communications, and a design structure on which the subject circuit resides are provided. The PLL circuit includes a current mode logic (CML) inductor capacitor (LC) Voltage Controlled Oscillator (VCO). The PLL circuit includes a reference circuit generates a virtual ground node for biasing noise sensitive components, providing level shifted VCO increment and decrement tuning values from a phase detector coupled by a respective resistor to tune a varactor of the LC VCO, and providing a loop filter function. The virtual ground node tracks a logic power supply noise, incurring no jitter penalty, and eliminating the need for a separate power supply for the PLL circuit. |
申请公布号 |
US8994460(B2) |
申请公布日期 |
2015.03.31 |
申请号 |
US201213675650 |
申请日期 |
2012.11.13 |
申请人 |
International Business Machines Corporation |
发明人 |
Kesselring Grant P.;Strom James D.;Van Goor Kenneth A.;Cheruiyot Kennedy K. |
分类号 |
H03L7/00;H03L7/099 |
主分类号 |
H03L7/00 |
代理机构 |
|
代理人 |
Pennington Joan |
主权项 |
1. A method for implementing a compact current mode logic inductor capacitor voltage controlled oscillator for high speed communications comprising:
providing a PLL circuit including a current mode logic (CML) inductor capacitor (LC) Voltage Controlled Oscillator (VCO); providing a reference circuit generating a virtual ground node for biasing noise sensitive components using a logic power supply, said virtual ground node tracking logic power supply noise, incurring no jitter penalty; and using said virtual ground node for providing level shifted VCO increment and decrement tuning values from a phase detector for tuning said CML LC VCO, and providing a loop filter function. |
地址 |
Armonk NY US |