Low-noise high efficiency bias generation circuits and method

摘要

A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a waveform appearing between the terminals, and/or wherein the bias voltage is generated by switching a small capacitance at cycles of said waveform. A charge pump for the bias generation may include a regulating feedback loop including an OTA that is also suitable for other uses, the OTA having a ratio-control input that controls a current mirror ratio in a differential amplifier over a continuous range, and optionally has differential outputs including an inverting output produced by a second differential amplifier that optionally includes a variable ratio current mirror controlled by the same ratio-control input. The ratio-control input may therefore control a common mode voltage of the differential outputs of the OTA. A control loop around the OTA may be configured to control the ratio of one or more variable ratio current mirrors, which may particularly control the output common mode voltage, and may control it such that the inverting output level tracks the non-inverting output level to cause the amplifier to function as a high-gain integrator.

主权项

1. An integrated operational transconductance amplifier (“OTA”) having a variable-ratio current mirror differential amplifier section comprising:
a) a differential pair of FETs including a first transistor M1 having a source S1 coupled to a source S2 of a second transistor M2 and to a current source Ics, the two forming a differential input pair of FETs for the OTA, the corresponding drains of the input pair forming a pair of differential current branches; b) an output voltage connection Vout+ coupled to one of the differential current branches; c) a variable ratio current mirror circuit, including
i) a current sensing circuit conducting a first current through one of the differential current branches; andii) a current mirror reflection circuit that generates a second current substantially reflective of the first current, in the other differential current branch, the current mirror reflection circuit comprising a third transistor arranged to operate in parallel with a fourth transistor; and d) a current mirror ratio control circuit comprising a first control FET coupled in series with the fourth transistor of the current mirror reflection circuit, the first control FET including a gate configured as a mirror ratio control node to which is applied a voltage that is continuously variable for varying a ratio between the first current conducted through the current sensing circuit and the second current conducted through the current mirror reflection circuit.