发明名称 Method of fabricating an ultra low-k dielectric self-aligned via
摘要 Methods of fabricating ultra low-k dielectric self-aligned vias are described. In an example, a method of forming a self-aligned via (SAV) in a low-k dielectric film includes forming a trench pattern in a metal nitride hardmask layer formed above a low-k dielectric film formed above a substrate. A via pattern is formed in a masking layer formed above the metal nitride hardmask layer. The via pattern is etched at least partially into the low-k dielectric film, the etching comprising using a plasma etch using a chemistry based on CF4, H2, and a diluent inert gas composition.
申请公布号 US8992792(B2) 申请公布日期 2015.03.31
申请号 US201213724698 申请日期 2012.12.21
申请人 Applied Materials, Inc. 发明人 Chang Chih-Yang;Kang Sean S.;Kao Chia-Ling;Bekiaris Nikolaos
分类号 C03C15/00;H01L21/3065;H01L21/3105;H01L21/311;H01L21/768 主分类号 C03C15/00
代理机构 Blakely Sokoloff Taylor Zafman LLP 代理人 Blakely Sokoloff Taylor Zafman LLP
主权项 1. A method of forming a self-aligned via (SAV) in a low-k dielectric film, the method comprising: etching a via pattern at least partially into in a low-k dielectric film having a metal nitride hard mask layer with a trench pattern thereon, the etching comprising using a plasma etch performed at a pressure of approximately 175 mTorr, a bottom bias (Wb) of approximately 250 W, a source power (Ws) of approximately 700 W, a chemistry based on CF4 at a flow rate of approximately 15 sccm, H2 at a flow rate of approximately 500 sccm, N2 at a flow rate of approximately 50 sccm, and Ar at a flow rate of approximately 1200 sccm, a showerhead to wafer gap of approximately 2.7 mm, an electrostatic chuck temperature of approximately 20° C., for approximately 95 seconds.
地址 Santa Clara CA US