| 摘要 |
1,102,483. Instruction decoders. TELEFONAKTIEBOLAGET L. M. ERICSSON. 26 April, 1966 [27 April, 1965], No. 18320/66. Headings G4A and G4H. In an instruction word decoder all instruction words commencing with the same character, e.g. the letter T have a different character in a preselected word position, e.g. the sixth position, so that when the first character of an instruction word stored in a buffer BR is read out the character in the preselected position is consequentially fed to a comparator JK for comparison with all possible characters in that position. In the embodiment described the first character in the buffer register entered from a keyboard TB is read out to a diode matrix AK1 controlling a register REG3 and a magnetic core memory NT. The coded outputs from the memory MT which represent the address of the portion of a memory MA associated with the first character T of the input word are fed via a register REG1 and an address translator AK2 to cause read out of the first column of cores in the portion TF of the memory MA. This causes the character in the sixth position of the input word to be fed to a register TR. Clock pulses applied to the register REG1 each modify the address stored in it by one binary unit so that the remaining columns in the memory TL are sequentially fed to the comparator JK until coincidence is reached. An output pulse from the comparator is then applied to AND gates A01 . . . A0n, . . . T01 . . . TOn together with a pulse from register REG3 to the group of gates associated with the letter T and a pulse is also applied from a register REG2 indicating which column of the memory TF was being read out so that only one of the output leads ABS . . . TAS is energized. The apparatus may be used for controlling telephone systems or computers.
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