SYSTEM AND METHOD FOR GENERATING A FIELD EFFECT TRANSISTOR CORNER MODEL

摘要

Disclosed are a system, method and computer program product for generating a field effect transistor (FET) corner model for a performance target (e.g., delay) that accurately preserves partial correlations among involved statistical model parameters (e.g., channel lengths, threshold voltages, overlap capacitance, etc.) of different types of field effect transistors within an integrated circuit. To accomplish this, an initial simulation run is performed to determine a nominal performance value with all statistical model parameters set at their nominal values. Then, multiple additional simulation runs are performed to determine corner performance values. In each successive additional simulation run, statistical model parameters of the different types of field effect transistors are offset from their nominal model parameters values in correlated ways. Then, based on performance differences between each of the corner performance values and the nominal performance value, a standard deviation for the performance target is determined.

主权项

1. A computer system comprising:
a memory storing a design for an integrated circuit comprising at least two different types of field effect transistors; and at least one processor accessing said design in said memory and generating a corner model for a performance target that preserves partial correlations between corresponding statistical model parameter values of said at least two different types field effect transistors by performing the following:
performing an initial simulation run to determine a nominal performance value, said corresponding statistical model parameter values of said at least two different types of field effect transistors being set, during said initial simulation run, at nominal model parameter values for said at least two different types of field effect transistors, said at least two different types of field effect transistors comprising at least a first field effect transistor having a first nominal model parameter value and a second field effect transistor having a second nominal model parameter value;performing multiple additional simulation runs to determine corner performance values, said corresponding statistical model parameter values of said at least two different types of field effect transistors being set, during each successive additional simulation run, at different predetermined statistical model parameter values for said at least two different types of field effect transistors that are offset from said nominal model parameters values for said at least two different types of field effect transistors such that, during each successive additional simulation run, a first predetermined statistical model parameter value for said first field effect transistor is offset from said first nominal model parameter value of said first field effect transistor and a second predetermined statistical model parameter value for said second field effect transistor is offset from said second nominal model parameter value of said second field effect transistor; anddetermining a standard deviation for said performance target based on performance differences between each of said corner performance values and said nominal performance value.