MEMORY DEVICE WITH MULTIPLE CELL WRITE FOR A SINGLE INPUT-OUTPUT IN A SINGLE WRITE CYCLE

摘要

A non-volatile memory device incorporates a write buffer within a multi-level column decoder to enable multiple memory cells associated with a single write driver to be written in parallel. In this manner, in a non-volatile memory such as a flash memory that performs batch write operation, a group of data bits for a single I/O can be written to the memory cells at a time, thereby reducing the number of write cycles required for writing a block of program data and increasing the speed of write operation.

主权项

1. A non-volatile memory device, comprising:
a two-dimensional array of non-volatile memory cells, each memory cell being accessed by a word line and a bit line, a first portion of the array of memory cells being associated with a first write driver and the first write driver being associated with a first input-output of the non-volatile memory device; a row decoder configured to control a plurality of word lines corresponding to rows of the array of memory cells, the row decoder being configured to activate one of the plurality of word lines in response to a row address; a multi-level column decoder configured to control a plurality of bit lines corresponding to columns of the array of memory cells, the column decoder being configured to activate two or more bit lines simultaneously in response to a plurality of column addresses; and a plurality of write buffers coupled to intermediate nodes of the column decoder, the intermediate nodes of the column decoder being nodes between a first decoding level and a second decoding level of the multi-level column decoder, wherein the plurality of write buffers store program data for memory cells associated with the first write driver at a first power supply voltage level and the plurality of write buffers provides the stored program data to two or more bit lines to be written to memory cells associated with the first write driver at a second power supply voltage level greater than the first power supply voltage level, the column decoder activating the two or more bit lines simultaneously to write the program data provided by the write buffers into respective memory cells associated with an activated word line.