| 发明名称 |
WATCHDOG TIMER AND CONTROL METHOD THEREFOR |
| 摘要 |
A watchdog timer including a first register that stores a first overflow time, a second register that stores a second overflow time, a detector and a counter that continues to count a clock signal to the first overflow time. When the detector detects an execution of a program for a flash memory, the counter clears a count value and continues to count the clock signal to the second overflow time. |
| 申请公布号 |
US2015089307(A1) |
申请公布日期 |
2015.03.26 |
| 申请号 |
US201414555958 |
申请日期 |
2014.11.28 |
| 申请人 |
Renesas Electronics Corporation |
发明人 |
Isogai Hideo |
| 分类号 |
G06F11/07 |
主分类号 |
G06F11/07 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A watchdog timer, comprising:
a first register that stores a first overflow time; a second register that stores a second overflow time; a detector; and a counter that continues to count a clock signal to the first overflow time, wherein when the detector detects an execution of a program for a flash memory, the counter clears a count value and continues to count the clock signal to the second overflow time. |
| 地址 |
Kawasaki-shi JP |
