MEMORY CIRCUIT COMPRISING MEANS FOR DETECTING AN ERROR INJECTION

摘要

The invention relates to a memory circuit (MEM1) comprising a memory plane (MA) comprising memory cells (MC), and an address decoder (RDEC) configured to apply to the memory plane signals (V0-VI-1, Vsel) for selecting a group of memory cells as a function of an address (AD1). According to the invention, the memory circuit comprises means (LCT) for capturing signals (Vsel) for selecting memory cells appearing in the memory plane, and means (RCOD), for reconstructing, on the basis of the selection signals captured, an address (AD2) of a selected group of memory cells.