发明名称 |
ADDRESS MULTIPLEXING IN PSEUDO-DUAL PORT MEMORY |
摘要 |
<p>A pseudo-dual port memory address multiplexing system includes a control circuit operative to identify a read request and a write request to be accomplished during a single clock cycle. A self time tracking circuit monitors a read operation and generates a switching signal when the read operation is determined to be complete. A multiplexer is responsive to the switching signal for selectively providing a read address and a write address to a memory address unit at the proper time.</p> |
申请公布号 |
EP2263235(B1) |
申请公布日期 |
2015.03.25 |
申请号 |
EP20090718990 |
申请日期 |
2009.02.27 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
JUNG, CHANGHO;ZHONG, CHENG |
分类号 |
G11C7/22;G11C7/10;G11C8/16 |
主分类号 |
G11C7/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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