| 摘要 |
In a solid-state imaging device 1, an overflow gate (OFG) 5 has a predetermined electric resistance value, while voltage application units 16, to 16 5 are electrically connected to the OFG 5 at connecting parts 17 1 to 17 5 . Therefore, when voltage values V1 to V5 applied to the connecting parts 17 1 to 17 5 by the voltage application units 16 1 to 16 5 are adjusted, the OFG 5 can yield higher and lower voltage values in its earlier and later stage parts, respectively. As a result, the barrier level (potential) becomes lower and higher in the earlier and later stage parts, so that all the electric charges generated in an earlier stage side region of photoelectric conversion units 2 can be caused to flow out to an overflow drain (OFD) 4, whereby only the electric charges generated in a later stage side region of the photoelectric conversion units 2 can be TDI-transferred. |
