Low-voltage differential signal activity detector

摘要

An activity detector for a differential signal formed by two components may include a current source connected to a power supply line, and a first transistor has a drain being powered by the current source, and has a source that forms a first input terminal receiving a first component of the differential signal. A second transistor has a drain being powered by the current source, and has a source forms a second input terminal receiving the second component of the differential signal. A bias circuit applies a potential to the gates of the first and second transistors, establishing a balance condition where all the current from the current source is distributed between the two transistors when the first and second input terminal potential is equal to a threshold value. An activity indication terminal is taken from the drains of the first and second transistors.

主权项

1. An activity detector for a differential signal having first and second components, the activity detector comprising:
a current source comprising an output transistor having a drain and configured to be coupled to a power supply line; a first transistor having a drain coupled to said current source, a source defining a first input terminal configured to receive the first component of the differential signal, and a gate; a second transistor having a drain coupled to said current source, a source defining a second input terminal configured to receive the second component of the differential signal, and a gate; a bias circuit configured to apply a voltage to the gates of said first and second transistors to establish a balance condition wherein current from said current source is distributed between said first and second transistors when a voltage of the first and second input terminals is equal to a threshold value, said bias circuit comprising
a first diode coupled to the power supply line and said output transistor to define a first current mirror configured to mirror current of the first diode on the drain of said output transistor,a second diode coupled in series with said first diode,the gates of said first and second transistors being coupled between said first and second diodes, anda further current source coupled between said second diode and configured to be coupled to a power supply reference voltage line, the threshold value being established between said further current source and said second diode,said first and second transistors defining with said second diode respective second and third current mirrors when a source voltage of said first and second transistors is equal to the threshold value, said first and second diodes and said first and second transistors being sized so that a sum of mirror factors of the second and third current mirrors is equal to a mirror factor of the first current mirror; and an activity indication terminal coupled to the drains of said first and second transistors.