Providing logical partions with hardware-thread specific information reflective of exclusive use of a processor core

摘要

Techniques for simulating exclusive use of a processor core amongst multiple logical partitions (LPARs) include providing hardware thread-dependent status information in response to access requests by the LPARs that is reflective of exclusive use of the processor by the LPAR accessing the hardware thread-dependent information. The information returned in response to the access requests is transformed if the requestor is a program executing at a privilege level lower than the hypervisor privilege level, so that each logical partition views the processor as though it has exclusive use of the processor. The techniques may be implemented by a logical circuit block within the processor core that transforms the hardware thread-specific information to a logical representation of the hardware thread-specific information or the transformation may be performed by program instructions of an interrupt handler that traps access to the physical register containing the information.

主权项

1. A method of providing hardware thread-specific information in a multi-threaded processor supporting a number of hardware threads for executing processes within multiple logical partitions, the method comprising:
maintaining the hardware thread specific information in a register within the multi-threaded processor; detecting access to the hardware thread-specific information by a currently-executing one of the processes; determining whether or not a privilege level of the currently-executing process indicates that the currently-executing process is a process within a given one of the multiple logical partitions; and responsive to determining that the privilege level of the currently-executing process indicates that the currently-executing process is a process within a given one of the multiple logical partitions, selectively transforming the hardware thread-specific information in a manner that indicates exclusive use of the multi-threaded processor by hardware threads executed for processes of the given logical partition, while masking hardware-thread specific information present in the register corresponding to one or more hardware threads of the multi-threaded processor that are assigned to execute processes of another logical partition other than the given logical partition, wherein the hardware thread-specific information is a value dependent on a logical hardware thread number of a particular hardware thread assigned to the given partition and specified by the access, and wherein the transforming comprises generating an actual hardware thread number from the logical hardware thread number, retrieving the hardware thread-specific information for the particular hardware thread using the actual hardware thread number, returning the retrieved hardware thread-specific information in response to the access, wherein the hardware thread-specific information is the hardware thread number of the hardware thread performing the access, and wherein the altering subtracts a base thread number for the given partition to obtain the actual hardware thread number.