发明名称 |
Method for manufacturing semiconductor device and semiconductor device |
摘要 |
An object is to provide a semiconductor device in which defects are reduced and miniaturization is achieved while favorable characteristics are maintained. A semiconductor layer is formed; a first conductive layer is formed over the semiconductor layer; the first conductive layer is etched with use of a first resist mask to form a second conductive layer having a recessed portion; the first resist mask is reduced in size to form a second resist mask; the second conductive layer is etched with use of the second resist mask to form source and drain electrodes each having a projecting portion with a tapered shape at the peripheries; a gate insulating layer is formed over the source and drain electrodes to be in contact with part of the semiconductor layer; and a gate electrode is formed in a portion over the gate insulating layer and overlapping with the semiconductor layer. |
申请公布号 |
US8987727(B2) |
申请公布日期 |
2015.03.24 |
申请号 |
US201213357902 |
申请日期 |
2012.01.25 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
Sasagawa Shinya;Kurata Motomu |
分类号 |
H01L29/786;H01L21/34;H01L29/417 |
主分类号 |
H01L29/786 |
代理机构 |
Robinson Intellectual Property Law Office, P.C. |
代理人 |
Robinson Eric J.;Robinson Intellectual Property Law Office, P.C. |
主权项 |
1. A semiconductor device comprising:
a semiconductor layer including a channel formation region; a source electrode and a drain electrode formed of a single layer and partly in contact with the semiconductor layer; a gate insulating layer over the source electrode and the drain electrode and in contact with the channel formation region; and a gate electrode overlapping with the channel formation region with the gate insulating layer positioned therebetween, wherein the source electrode and the drain electrode each has a projecting portion, wherein the projecting portion comprises a first surface and a second surface and overlaps with the semiconductor layer, wherein the first surface is a side surface of the projecting portion with a tapered shape, and an angle formed by the first surface and the second surface is more than 90° and less than 180°, wherein a thickness between the second surface and a top surface of the semiconductor layer is thinner than a portion of the source electrode and the drain electrode other than the projecting portion, and wherein the portion is overlapped with the semiconductor layer. |
地址 |
Atsugi-shi, Kanagawa-ken JP |