High-K metal gate electrode structures formed by cap layer removal without sacrificial spacer

摘要

In sophisticated semiconductor devices, high-k metal gate electrode structures may be formed in an early manufacturing stage with superior integrity of sensitive gate materials by providing an additional liner material after the selective deposition of a strain-inducing semiconductor material in selected active regions. Moreover, the dielectric cap materials of the gate electrode structures may be removed on the basis of a process flow that significantly reduces the degree of material erosion in isolation regions and active regions by avoiding the patterning and removal of any sacrificial oxide spacers.

主权项

1. A method, comprising:
forming a strain-inducing semiconductor material in a first active region of a first transistor in the presence of a first gate electrode structure formed above said first active region while covering a second active region of a second transistor and a second gate electrode structure formed above said second active region with a first spacer layer, said first gate electrode structure comprising a first spacer and a first dielectric cap layer, said second gate electrode structure comprising a second dielectric cap layer; forming a second spacer layer above said first and second active regions after forming said strain-inducing semiconductor material; selectively modifying an etch rate of said second dielectric cap layer so that said selectively modified etch rate is greater than an etch rate of said first dielectric cap layer when said first and second dielectric cap layers are exposed to a common etch process, wherein selectively modifying said etch rate of said second dielectric cap layer comprises performing an ion bombardment; after selectively modifying said etch rate of said second dielectric cap layer, performing at least one etching process on said second spacer layer to form second spacers adjacent said first and second gate structures; after forming said second spacers, removing said first and second dielectric cap layers; and forming drain and source regions in said first and second active regions.