发明名称 Reducing artifacts within a video processing system
摘要 An embodiment of a video processing system can include an alignment detector block configured to determine whether a video signal is misaligned and, responsive to determining that the video signal is misaligned, generate notifications indicating misalignment of the video signal. The video processing system also can include an unlock detector block coupled to the alignment detector block that is configured to determine an amount of time that the video signal is misaligned according to the notifications from the alignment detector block. The unlock detector block can be configured to ignore misalignment of the video signal until the video signal is misaligned for an amount of time exceeding a threshold amount of time.;Another embodiment of the video processing system can include a buffer, a packetizer block that is coupled to the buffer, and a buffer controller that is coupled to the buffer and the packetizer block.
申请公布号 US8989277(B1) 申请公布日期 2015.03.24
申请号 US201113288309 申请日期 2011.11.03
申请人 Xilinx, Inc. 发明人 Dhanikonda Venkata V.;Ananthapadmanaban Arun
分类号 H04N7/12;H04N21/43;H04L7/00 主分类号 H04N7/12
代理机构 代理人 Cuenot Kevin T.
主权项 1. A video processing system comprising: a lane alignment block configured to perform a synchronization of a video signal; an alignment detector block configured to determine whether the video signal output from the lane alignment block is misaligned and, responsive to determining that the video signal is misaligned, generate notifications indicating misalignment of the video signal; and an unlock detector block, coupled to the alignment detector block and the lane alignment block, configured to determine an amount of time that the video signal is misaligned according to the notifications from the alignment detector block; wherein the unlock detector block is configured to ignore misalignment of the video signal until the video signal is misaligned for an amount of time exceeding a threshold amount of time; and wherein responsive to determining that the video signal is misaligned for an amount of time exceeding the threshold amount of time, the unlock detector block is configured to initiate an alignment training process by the lane alignment block using training data; wherein the threshold amount of time is greater than zero.
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