Systems and methods for controlling frequency synthesis

摘要

Disclosed are systems and method for controlling frequency synthesizers. A control system can be implemented in a phase-locked loop (PLL), such as a Frac-N PLL of a frequency synthesizer, to reduce or eliminate reference spurs. In some embodiments, such a control system can include a phase detector configured to receive a reference signal and a feedback signal. The phase detector can be configured to generate a first signal representative of a phase difference between the reference signal and the feedback signal. The control system can further include a charge pump configured to generate a compensation signal based on the first signal. The control system can further includes an oscillator configured to generate an output signal based on the compensation signal. The compensation signal can be configured to reduce or substantially eliminate one or more reference spurs associated with the frequency synthesizer.

主权项

1. A control system for a frequency synthesizer of a wireless device, the control system comprising:
a phase detector configured to receive a reference signal and a feedback signal, the phase detector further configured to generate a first signal representative of a phase difference between the reference signal and the feedback signal; a charge pump in communication with the phase detector, the charge pump configured to generate a current signal based at least in part on the first signal, the charge pump further configured to charge a capacitance element upon receipt of a charge signal such that the charged capacitance has a voltage representative of the phase difference; a loop filter configured to receive the current signal and generate a corresponding voltage signal, the charge signal resulting from a logic operation between the first signal and a switch signal corresponding to the first signal, the switch signal configured to allow the loop filter to receive the current signal; and an oscillator configured to receive the voltage signal from the loop filter and generate an output signal based on the voltage signal, the voltage signal configured to reduce or substantially eliminate one or more spurs associated with the frequency synthesizer.