| 发明名称 | Wafer and method of manufacturing the same | ||
| 摘要 | A wafer includes a first die, a second die, and a scribe lane located between the first die and the second die. The scribe lane includes a first doped silicon region, and does not directly contact the first die and the second die. | ||
| 申请公布号 | US8987867(B2) | 申请公布日期 | 2015.03.24 |
| 申请号 | US201314078866 | 申请日期 | 2013.11.13 |
| 申请人 | Samsung Electronics Co., Ltd. | 发明人 | Lee Ji Hyun;Lim Jong Hyoung |
| 分类号 | H01L23/544;H01L21/00;H01L21/71;H01L27/02 | 主分类号 | H01L23/544 |
| 代理机构 | Lee & Morse, P.C. | 代理人 | Lee & Morse, P.C. |
| 主权项 | 1. A wafer, comprising: a first die; a second die; and a scribe lane located between the first die and the second die, wherein the scribe lane includes a first doped silicon region and a second doped silicon region that do not directly contact the first die and the second die, the first doped silicon region and the second doped silicon region being respectively formed of n-type silicon and p-type silicon. | ||
| 地址 | Suwon-si, Gyeonggi-do KR | ||