Optimizing application specific integrated circuit pinouts for high density interconnect printed circuit boards

摘要

Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

主权项

1. An integrated circuit (IC) chip comprising a plurality of pins disposed on a common plane of the IC chip, the pins are grouped into a plurality of concentric rings, wherein the pins are assigned to a plurality of signal nets, and wherein each of the signal nets is assigned to a respective one of the plurality of concentric rings according to at least one of: (i) a plurality of different signal speeds associated with the signal nets and (ii) differing amounts of circuitry associated with the signal nets.