发明名称 Systems and methods for dynamic dwelling time for tuning display to reduce or eliminate mura artifact
摘要 Systems and methods for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve turning on an electronic display and programming pixels the electronic display to a uniform gray level. An initial luminance value may be determined and, after waiting a period of time, a subsequent luminance of the pixels may be measured. When a difference between the subsequent luminance and initial luminance is within a threshold, the mura artifact may be understood to have settled and the electronic display may be calibrated.
申请公布号 US8988471(B2) 申请公布日期 2015.03.24
申请号 US201213601801 申请日期 2012.08.31
申请人 Apple Inc. 发明人 Al-Dahle Ahmad;Stronks David A.;Bae Hopil
分类号 G09G5/10 主分类号 G09G5/10
代理机构 Fletcher Yoder PC 代理人 Fletcher Yoder PC
主权项 1. A method comprising: turning on an electronic display; programming pixels the electronic display to a uniform gray level; measuring an initial luminance of the pixels; waiting a first period of time; measuring a subsequent luminance of the pixels; calibrating the display to reduce artifacts when a magnitude of a difference between the subsequent luminance and the initial luminance is within a threshold; and when the magnitude of the difference between the subsequent luminance and the initial luminance does not exceed the threshold: waiting a second period of time; andremeasuring the subsequent luminance of the pixels; wherein the display is calibrated to reduce artifacts when a magnitude of a difference between the latest two measurements of luminance is within the threshold.
地址 Cupertino CA US