发明名称 Comparison circuits
摘要 A comparison circuit is provided and includes first and second comparators and a first time-to-digital comparator. The first comparator with a first offset voltage receives an input signal and generates a first comparison signal and a first inverse comparison signal. The second comparator receives the input signal and generates a second comparison signal and a second inverse comparison signal. The first offset voltage is larger than the second offset voltage. The first time-to-digital comparator receives the first comparison signal and the second inverse comparison signal and generates first and second determination signals according to the first comparison signal and the second inverse comparison signal. The first and second determination signals indicate whether a voltage of the input signal is larger than a first middle voltage. The first middle voltage is equal to a half of the sum of the first offset voltage and the second offset voltage.
申请公布号 US8988265(B2) 申请公布日期 2015.03.24
申请号 US201313941598 申请日期 2013.07.15
申请人 MediaTek Inc. 发明人 Shu Yun-Shiang
分类号 H03M1/12;H03M1/50;H03M1/20;H03M1/00;H03M1/36 主分类号 H03M1/12
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A comparison circuit comprising: a first comparator with a first offset voltage for receiving an input signal and performing a first comparison operation to the input signal to generate a first comparison signal; a second comparator with a second offset voltage for receiving the input signal and performing a second comparison operation to the input signal to generate a second inverse comparison signal, wherein the first offset voltage is larger than the second offset voltage; and a first time-to-digital comparator for receiving the first comparison signal and the second inverse comparison signal and generating a first determination signal and a second determination signal according to the first comparison signal and the second inverse comparison signal, wherein the first determination signal and the second determination signal indicate whether a voltage of the input signal is larger than a first middle voltage, and wherein the first middle voltage is between the first offset voltage and the second offset voltage.
地址 Hsin-Chu TW
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