| 发明名称 |
Analogue to digital converter |
| 摘要 |
An Analogue to Digital Converter (ADC) having a Gated Ring Voltage Controlled Oscillator, GRVCO, to generate a phase signal according to an input voltage; and a quantization circuit to generate a quantized phase output signal according. The GRVCO operates in either a first or second mode of operation according to a gating control signal. In the first mode of operation, the GRVCO operates in a VCO mode with gating disabled. In the second mode of operation, the GRVCO operates in a GRVCO mode wherein gating is enabled or disabled according to a gating signal. |
| 申请公布号 |
US8988264(B2) |
申请公布日期 |
2015.03.24 |
| 申请号 |
US201313780679 |
申请日期 |
2013.02.28 |
| 申请人 |
NXP, B.V. |
发明人 |
Noh Kyoohyun;Pineda De Gyvez Jose de Jesus;Vertregt Maarten |
| 分类号 |
H03M1/12;H03M1/00;H03M1/60;H03M1/06 |
主分类号 |
H03M1/12 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An analogue to digital converter, ADC, comprising:
a Gated Ring Voltage Controlled Oscillator, GRVCO, configured to generate a phase signal according to an input voltage; and a quantization circuit configured to generate a quantised phase output signal, wherein the GRVCO is configured to operate in either a first or a second mode of operation according to a mode control signal, wherein, in the first mode of operation, the GRVCO operates in a VCO mode with gating disabled and, in the second mode of operation, the GRVCO operates in a GRVCO mode wherein gating is enabled or disabled according to a gating signal. |
| 地址 |
Eindhoven NL |
