| 发明名称 | Consolidating multiple neurosynaptic cores into one memory | ||
| 摘要 | Embodiments of the invention relate to a neural network system comprising a single memory block for multiple neurosynaptic core modules. One embodiment comprises a neural network system including a memory array that maintains information for multiple neurosynaptic core modules. Each neurosynaptic core module comprises multiple neurons. The neural network system further comprises at least one logic circuit. Each logic circuit receives neuronal firing events targeting a neurosynaptic core module of the neural network system, and said logic circuit integrates the firing events received based on information maintained in said memory for said neurosynaptic core module. | ||
| 申请公布号 | US8990130(B2) | 申请公布日期 | 2015.03.24 |
| 申请号 | US201213683234 | 申请日期 | 2012.11.21 |
| 申请人 | International Business Machines Corporation | 发明人 | Alvarez-Icaza Rivera Rodrigo;Arthur John V.;Cassidy Andrew S.;Merolla Paul A.;Modha Dharmendra S. |
| 分类号 | G06F15/18;G06E1/00;G06E3/00;G06G7/00;G06N3/02;G06N3/04;G06N3/063 | 主分类号 | G06F15/18 |
| 代理机构 | Sherman IP LLP | 代理人 | Sherman IP LLP ;Sherman Kenneth L.;Perumal Hemavathy |
| 主权项 | 1. A neural network system, comprising: a memory array that maintains information for multiple neurosynaptic core modules, wherein each neurosynaptic core module comprises multiple neurons; and at least one logic circuit, wherein each logic circuit: receives neuronal firing events targeting a neurosynaptic core module of the neural network system; andintegrates the firing events received based on information maintained in said memory array for said neurosynaptic core module. | ||
| 地址 | Armonk NY US | ||