Programmable memory built in self repair circuit

摘要

An integrated circuit chip comprising at least one programmable built-in self-repair (PBISR) for repairing memory is described. The PBISR comprises an interface that receives signals external to the integrated chip. The PBISR further includes a port slave module that programs MBISR registers, program and instruction memory. The PBISR further comprises a programmable transaction engine and a programmable checker. Further, the MBISR comprises an eFUSE cache that implements logic to denote defective elements.

主权项

1. An integrated circuit chip comprising:
at least one memory built-in self-repair (MBISR) module comprising:
an interface that receives signals external to said integrated circuit chip; andat least a first cache coupled to the interface, wherein said first cache implements logic to denote defective elements; configuration registers coupled to said MBISR module and configured to store configuration values; and a built-in self-test (BIST) module communicatively coupled to said MBISR module, wherein said BIST module is configured to control loop manipulation op-code, access generation op-code, and said configuration values.