Carbon nanotube transistor employing embedded electrodes

摘要

Carbon nanotubes can be aligned with compatibility with semiconductor manufacturing processes, with scalability for forming smaller devices, and without performance degradation related to structural damages. A planar structure including a buried gate electrode and two embedded electrodes are formed. After forming a gate dielectric, carbon nanotubes are assembled in a solution on a surface of the gate dielectric along the direction of an alternating current (AC) electrical field generated by applying a voltage between the two embedded electrodes. A source contact electrode and a drain contact electrode are formed by depositing a conductive material on both ends of the carbon nanotubes. Each of the source and drain contact electrodes can be electrically shorted to an underlying embedded electrode to reduce parasitic capacitance.

主权项

1. A structure comprising:
a first embedded electrode and a second embedded electrode located in an insulator layer of a substrate; a dielectric layer located directly on a topmost surface of said insulator layer; a buried gate electrode embedded in said insulator layer and having a topmost surface in direct contact with a bottom surface of said dielectric layer; and a plurality of carbon nanotubes that are substantially parallel to one another and located on a portion of said dielectric layer overlying a portion of said insulator layer between said first embedded electrode and said second embedded electrode.