发明名称 |
Successive approximation register (SAR) analog-to-digital converter (ADC) having optimized filter |
摘要 |
A system such as a mechanically tuned radio can have a signal path to receive and process an incoming radio frequency (RF) signal and to provide the processed signal to a first analog-to-digital converter (ADC) to convert the processed signal to a digital signal and to digitally demodulate the digital signal to obtain an audio signal, where this first ADC is separate from an auxiliary ADC not part of the signal path. |
申请公布号 |
US8988263(B2) |
申请公布日期 |
2015.03.24 |
申请号 |
US201213562729 |
申请日期 |
2012.07.31 |
申请人 |
Silicon Laboratories Inc. |
发明人 |
Zhan Sanyi;Cooley Daniel J.;Zhang Ligang |
分类号 |
H03M1/12;H03M1/46;H03M3/00 |
主分类号 |
H03M1/12 |
代理机构 |
Trop, Pruner & Hu, P.C. |
代理人 |
Trop, Pruner & Hu, P.C. |
主权项 |
1. A system comprising:
a variable impedance controllable by a manual tuning mechanism to provide an analog signal; and an analog-to-digital converter (ADC) coupled to the variable impedance to receive the analog signal, the ADC including: a comparator to compare the analog signal received at a first input with a feedback signal received at a second input; a successive approximation register (SAR) coupled to the comparator and having N-bits of resolution, wherein the SAR is to update a bit of an N-bit output based on the comparison; a delta-sigma modulator (DSM) coupled to the SAR to receive the N-bit output of the SAR and to generate an output; and a digital-to-analog converter (DAC) coupled to the DSM to convert the output to the feedback signal; and a low pass filter (LPF) to filter and output the feedback signal to the second input of the comparator. |
地址 |
Austin TX US |